When a UAV operates beyond the radio horizon from its ground control station — whether due to terrain masking, urban canyons, or extreme range — a Signal Relay PCB aboard an intermediate relay UAV (or ground node) provides the store-and-forward bridge that maintains end-to-end connectivity. This dedicated relay board hosts multiple transceivers, a packet-processing engine, and quality-of-service (QoS) logic that routes traffic across a dynamic mesh network of 2 to 50 nodes. This blog examines the PCB architecture that powers airborne communication relays.
Multi-Transceiver Architecture
A relay PCB typically integrates three to five independent transceivers on different frequency bands — for example, one S-band link toward the GCS, one C-band link toward the mission UAV, one L-band backup, and one ISM-band link for mesh inter-node communication. Each transceiver occupies a physically separate PCB zone with its own antenna connector (SMA or MCX), RF front-end, modem, and baseband processor.
The board is laid out in a radial topology with the central packet processor (FPGA or multi-core SoC) at the center and transceivers arrayed around the perimeter. This minimizes RF trace lengths while maximizing physical separation between antenna ports — typically >60 mm edge-to-edge for boards operating up to 6 GHz.
Packet Processing & QoS Engine
The relay's FPGA (Xilinx Kintex-7 or Lattice CertusPro-NX) implements a cut-through packet switch with <5 µs per-hop latency. Incoming packets from any transceiver are CRC-validated, classified by QoS priority (8 traffic classes per DiffServ), and forwarded to the appropriate output transceiver(s). The FPGA connects to each modem via JESD204B or LVDS links, with all serial lanes length-matched to within 1 mm and impedance-controlled to 100 Ω differential.
A dedicated packet buffer memory — two 256 MB DDR3 SDRAM chips in a fly-by topology — provides store-and-forward capability for non-real-time traffic when links are temporarily interrupted. The DDR3 interface runs at 533 MHz with write-leveling and DQS gating, requiring length matching to ±25 ps across all byte lanes.
Co-Site Interference Management
With up to five simultaneous transmit/receive chains, the relay board must suppress over 100 dB of co-site self-interference. This is achieved through a combination of:
Frequency separation: At least 20% fractional bandwidth between any two concurrently active channels.
Physical isolation: Grounded via fences between transceiver zones, achieving 15–20 dB additional isolation per fence.
Tx/Rx timing coordination: TDMA slotting synchronized by a GPS-disciplined 1PPS signal distributed across the board on a dedicated 50 Ω clock trace.
Adaptive filtering: Tunable bandpass filters on each receiver front-end that track the operating frequency and suppress adjacent-channel power.
Timing Synchronization
Mesh TDMA requires all relay nodes to maintain time synchronization within ±1 µs. The relay board includes a GPS-disciplined oscillator (GPSDO) — a u-blox NEO-M9N GNSS receiver coupled with a high-stability TCXO — that generates the 1PPS reference and 10 MHz clock. The 1PPS signal is routed on a dedicated 50 Ω stripline with controlled delay, and is fanned out to all modems and the FPGA through a low-skew clock buffer (CDCLVC1104).
Power Architecture
The relay board consumes 25–60W total with all transceivers active, demanding a multi-rail power tree from a 12–28V aircraft bus. Isolated DC-DC bricks (Vicor DCM or SynQor) generate intermediate 5V and 3.3V rails, with point-of-load LDOs and switching regulators at each transceiver and the FPGA. Each transceiver zone has its own LC filter at the power entry to prevent conducted noise from propagating between channels.
Conclusion
The Signal Relay PCB is the networking backbone of multi-UAV operations, demanding expertise in multi-transceiver RF co-existence, high-speed digital packet switching, and precision timing distribution. Superb Tech fabricates relay PCBs with radial multi-transceiver layouts, via-fence isolation, controlled-impedance clock distribution, and VNA-verified RF channel performance.
