Advanced HDI PCB · SiP · mSAP — High-Density Interconnect Solutions

2026-06-25

What Is Advanced HDI?

Advanced HDI (High-Density Interconnect) extends beyond standard multi-layer PCB fabrication by incorporating laser-drilled micro-vias, sequential lamination build-up layers, and fine-line trace/space geometries below 4/4 mil. Where a standard through-hole multilayer board connects every layer with mechanically drilled vias that span the entire board thickness, HDI uses blind and buried micro-vias that connect only the layers they need to — freeing routing space on other layers and enabling denser component placement. At Superb Automation, advanced HDI PCBs are fabricated to customer Gerber and stackup files. The fabrication process — micro-via laser drilling, sequential lamination registration, fine-line LDI imaging and etching — is tuned per build based on the customer's via stack definition and design rules.

HDI Via Structures

Via Type	Description	Typical Use
Through-hole via	Mechanically drilled, spans all layers	Power, ground, low-speed signals, connectors
Blind via	Laser-drilled from an outer layer to an inner layer; does not pass through the entire board	BGA fanout from outer layer to adjacent signal layer
Buried via	Laser-drilled between two inner layers; not visible from either outer surface	Interconnect between inner routing layers without consuming outer-layer space
Stacked via	Micro-vias stacked vertically across multiple build-up layers, connected through captured pads	High-density BGA with pitch ≤ 0.5 mm requiring layer-to-layer vertical interconnect
Staggered via	Micro-vias offset between adjacent build-up layers to reduce alignment tolerance stack-up	Cost-optimized HDI where layer count allows staggered placement
Via-in-pad	Via placed directly in a BGA or component pad; filled and plated over to create a flat surface	0.4 mm pitch BGA where fanout vias cannot fit between pads

HDI Build-Up Structures

HDI complexity is classified by the number of sequential build-up layers. Superb Automation fabricates the following HDI structures per customer specification:

Type	Structure	Application
1-N-1	One build-up layer on each side of a conventional core	Moderate BGA density — 0.8 mm pitch, smartphone and tablet main boards
2-N-2	Two build-up layers on each side	Higher BGA density — 0.5 mm pitch, high-end mobile processors, FPGA boards
3-N-3 and above	Three or more build-up layers	Ultra-dense BGA — 0.4 mm pitch and below, advanced packaging interposers
Any-layer	Every layer pair connected by micro-vias; no conventional through-hole core	Maximum interconnect density — wearable devices, stacked-die memory modules

SiP (System-in-Package) Substrates

A System-in-Package (SiP) integrates multiple semiconductor dice — processor, memory, power management, RF — into a single packaged module, interconnected by a high-density substrate rather than a conventional PCB. The SiP substrate functions as a miniature multilayer PCB with finer features than standard HDI: trace/space below 25/25 µm, micro-via diameters below 75 µm, and dielectric thicknesses below 40 µm. Substrate fabrication uses processes closer to semiconductor packaging than conventional PCB manufacturing. Superb Automation fabricates SiP substrates per customer design files — the substrate acts as the interconnect backbone for the multi-die module, and its quality directly determines the packaged module's signal integrity, thermal performance, and assembly yield.

mSAP — Modified Semi-Additive Process

mSAP (Modified Semi-Additive Process) is a fine-line fabrication method that achieves trace/space geometries below 25/25 µm — beyond the capability of conventional subtractive etching. The process starts with a thin copper foil (typically 1.5–5 µm) on the dielectric. The desired trace pattern is imaged, and copper is electroplated onto the exposed areas to build the final trace thickness. The photoresist is stripped, and a brief flash etch removes the thin base copper between traces. Because the plated copper is much thicker than the base foil being etched away, lateral undercut is minimal — enabling straight sidewalls and tight spacing. mSAP is the dominant process for IC substrate manufacturing and is increasingly used in advanced HDI PCBs where BGA pitch drops below 0.4 mm.

Advanced HDI Fabrication — Process Control Points

Layer-to-layer registration: Each sequential lamination step adds a registration tolerance. After each build-up layer is laminated, X-ray measurement confirms alignment with the underlying layers. Cumulative registration error across all build-up steps is maintained within the customer's pad-to-via alignment specification.
Micro-via laser drilling: UV laser drilling creates micro-vias with diameters from 50 µm upward. Via depth is controlled by laser pulse energy and count — critical for blind vias that must stop precisely on an inner-layer capture pad without penetrating into the dielectric below.
Via fill and planarization: Via-in-pad structures require the via to be filled — typically with epoxy or copper — and the surface planarized to produce a flat, solderable pad. Fill voids are detected by X-ray or cross-section and must be below the customer's void percentage specification.
Fine-line imaging: LDI (Laser Direct Imaging) is essential for HDI — film-based imaging cannot maintain the registration accuracy required across multiple build-up layers. LDI exposure compensates for panel dimensional changes measured at each lamination step.

Superb Automation — Advanced HDI Capability

HDI structures: 1-N-1 through 3-N-3 and any-layer — per customer via stack definition
Micro-via laser drilling: UV laser with depth-controlled blind via formation
Sequential lamination: Registration verified by X-ray at each build-up step
Fine-line LDI imaging: Essential for multi-step HDI where cumulative registration tolerance must be tightly controlled
Via fill and planarization: Epoxy or copper via fill with surface planarization for via-in-pad designs
mSAP-capable line: Fine-line processing for sub-25/25 µm trace/space geometries
Build-to-print: Customer Gerber, stackup, and via definition drive the fabrication process