The OCP Accelerator Module (OAM) specification defines an open-standard form factor for GPU and AI accelerator mezzanine cards. Originally developed by the Open Compute Project with contributions from Baidu, Facebook, and Microsoft, OAM eliminates vendor lock-in by standardizing the mechanical, electrical, and thermal interfaces of AI accelerator modules. This article explores the PCB design requirements for OAM-compliant carrier boards.

OAM Form Factor Specifications

PCB Layer Stackup for OAM

An OAM module hosting a GPU + HBM stack typically uses 20–28 layers:

• Top layer: GPU/ASIC BGA (0.4–0.5 mm pitch), HBM stacks, VRM components

• Signal layers (14–18 layers): Host interface PCIe/CXL routing, GPU-to-HBM interposer escape routing (limited on the module itself — most HBM routing is on the silicon interposer)

• Power planes (4–6 layers): Vcore (0.75–0.85V at 600–800A), Vmem (1.1–1.2V at 40–60A), Vio (1.8V at 5A)

• Ground planes: Interleaved with signal layers for return path continuity

• Material: Megtron 6 or 7 for signal layers; high-Tg FR-4 for dedicated power layers (cost optimization)

Host Interface: 112G PAM4 Connectivity

The OAM connector supports PCIe 5.0 ×16 (32 GT/s) and future PCIe 6.0 (64 GT/s PAM4). Key signal integrity requirements:

• Channel insertion loss: < -20 dB at 16 GHz (PCIe 5.0) from GPU silicon to host connector pin, including the module PCB, connector, and baseboard PCB

• Return loss: < -12 dB at Nyquist across the channel bandwidth — connector impedance discontinuity is the primary challenge

• Crosstalk: < -40 dB integrated crosstalk noise (ICN) per PCIe 5.0 spec at the connector interface

• AC coupling: 220 nF capacitors on the module side for PCIe 5.0, placed within 400 mil of the connector

• Redriver/retimer: Some OAM designs include on-module PCIe retimers (e.g., Astera Labs Aries) to extend channel reach on the baseboard

Power Delivery: 700W+ on a 102×175 mm Card

Delivering 700W+ through a mezzanine connector and distributing it across a compact PCB is one of OAM's hardest challenges:

• Connector power pins: OAM connectors dedicate 40–60% of pins to power delivery. Each pin rated at 1.5–2.5A. Total connector current capacity must exceed 100A per voltage rail

• VRM topology: 12V input from baseboard → on-module multi-phase buck converter (16–20 phases) → 0.8V Vcore. DrMOS power stages rated 80–90A each

• Planar magnetics: Some designs use PCB-embedded planar inductors and transformers to reduce Z-height (critical for 1U server compatibility)

• Decoupling: Ultra-low ESL MLCCs (reverse-geometry 0306 or 0508, 2–10 μF) placed in a tight grid under the GPU BGA, achieving <0.2 nH mounted inductance

Thermal Management Integration

OAM modules are designed for direct liquid cooling or massive air-cooled heatsinks:

• Unified Baseboard Mount (UBM): A metal stiffener frame that provides both mechanical rigidity and thermal interface — the heatsink bolts directly to the UBM, not the PCB

• PCB keepout zones: The UBM clamping area requires large keepout zones free of tall components — restricts VRM placement

• Warpage control: With 2.2 mm thickness and 700W thermal load, the PCB must maintain less than 0.3% warpage at operating temperature (85°C). High-Tg materials (Tg >180°C) and symmetric stackups are mandatory

Manufacturing Considerations

• Fine-pitch BGA: 0.4 mm pitch GPU packages require <100 μm trace/space and staggered microvia breakout — laser-drilled blind vias with 75 μm drill

• Impedance control: 85Ω differential ±7% for PCIe; tighter than industry-standard ±10% due to limited channel margin

• Surface finish: ENEPIG for fine-pitch BGA land pads; OSP or immersion silver for non-critical areas

• Via fill: All blind/buried vias must be copper-filled and planarized for via-in-pad reliability