RF Demodulation Board PCBA

Wide Dynamic Range IQ Demodulator for Direct-Conversion Receivers and Radar IF Strips

Product Overview

The RF Demodulation Board PCBA achieves wide-dynamic-range IQ demodulation with superior image rejection for high-performance receiver applications from 400 MHz to 6 GHz. The board features a high-IIP3 quadrature demodulator with a passive mixer core — typically a diode-ring or FET-ring architecture — providing exceptional linearity with +32 dBm IIP3 without the noise penalty inherent in active Gilbert-cell designs. Our matched-length differential routing on the I and Q baseband outputs maintains better than 45 dB of image rejection without digital correction, reducing DSP overhead in the downstream processor and preserving receiver dynamic range. The LO path incorporates a polyphase filter for quadrature generation with sub-degree phase accuracy across an octave bandwidth, eliminating the need for external hybrid couplers. Onboard baseband amplifiers with programmable gain provide direct interface to dual-channel ADCs, eliminating external gain stages and their associated noise figure contribution. Every demodulator board is characterized for image rejection, IIP2, IIP3, noise figure, and DC offset using automated RF test procedures. Critical for direct-conversion receivers where demodulator linearity sets the system spur-free dynamic range, radar IF strips, spectrum analysis front-ends, and wideband SIGINT receivers.

Key Specifications

PCBA Assembly Challenges

Demodulator assembly demands the same baseband symmetry as the modulator but with additional sensitivity to noise coupling. The I and Q differential baseband output traces must be length-matched to ±2 mil and routed over a continuous ground plane without splits — any ground discontinuity under one leg of a differential pair creates a common-mode-to-differential conversion that appears as an in-band spur. The polyphase filter network in the LO path consists of precision RC stages; capacitor placement within 1 mm of the demodulator IC is essential to minimize parasitic inductance that shifts the quadrature phase accuracy. The passive mixer core generates no gain, so the post-mixer baseband amplifier's input-referred noise directly adds to the system noise figure — the amplifier's input traces must be shielded by ground guard rings to prevent digital noise pickup from adjacent control lines. Solder paste inspection on the demodulator's fine-pitch QFN pads is critical: a single RF input pad void degrades the input match and directly increases conversion loss.

Test Strategy

Demodulator board testing starts with DC characterization: IQ offset voltage is measured at the baseband outputs with the RF input terminated and LO applied, verifying that the mixer core is balanced. IIP2 and IIP3 are measured using a two-tone test with tones spaced 1 MHz apart, measuring the second-order and third-order intermodulation products at the baseband outputs. Image rejection is characterized by applying an RF signal offset from the LO and measuring the power difference between the desired and image sidebands at the IQ outputs — this is repeated across the full operating band. Noise figure is measured using the Y-factor method with a calibrated noise source at the RF input. The polyphase filter is verified by measuring the relative phase of the I and Q LO signals at the demodulator core using an on-board test point and high-impedance probe. Baseband amplifier gain flatness and bandwidth are characterized with a network analyzer.

PCB Manufacturing Difficulty

Demodulator PCB fabrication challenges center on the LO polyphase filter network. The RC stages in the polyphase filter require precision component values — resistor tolerance of ±0.1% and capacitor tolerance of ±1% — but the PCB trace parasitics also contribute to the phase shift. The trace lengths between filter stages must be controlled to ±1 mil to prevent phase accumulation errors. The RF input trace must maintain 50 Ω impedance through the entire path from the connector to the demodulator IC, including through any input matching network. The baseband I and Q output pairs must be routed as 100 Ω differential pairs with consistent spacing; any variation creates a common-mode impedance mismatch that degrades the CMRR of the downstream ADC driver. Ground via stitching along all RF and LO traces must maintain λ/20 spacing at 6 GHz (approximately 2.5 mm). Finished boards are TDR-verified on all RF, LO, and baseband paths.

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